Many devices use high-speed input/output (I/O) ports to transmit information to or receive information from other devices. In some circumstances, the high-speed I/O ports may be grouped together, which each high-speed I/O port using a single lane of the group of high-speed I/O ports. Each of the high-speed I/O ports may be provided with a high-speed clock to clock the data being transmitted to or received from the other devices. These high-speed I/O ports may operate at much higher speeds than the processing speeds used in the transmitting or receiving devices. As a result, higher speed clocks may be generated for the high-speed I/O ports.
The subject matter claimed herein is not limited to embodiments that solve any disadvantages or that operate only in environments such as those described above. Rather, this background is only provided to illustrate one example technology area where some embodiments described herein may be practiced.